On claim :
=> R0 = Vector number + 256
R1 = Address of replacement routine
<= R1 = Address of original routine
On release :
=> R0 = Vector number
R1 = Address of original routine
R2 = Address of your routine
This call is used to allow low-level code to claim the ARM's hardware vectors which are called when interrupts and aborts occur.
The address off your routine must be provided on release to ensure claims and releases happen in the correct order. If the address currently on the vector differs from that in R2, an error is returned.
Processor vectors (3.50+)
# Vector
0 Branch through zero
1 Undefined instruction
2 SWI executed
3 Prefetch abort
4 Data abort
6 IRQ
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