Syntax: ASR Rd
Operation: Rd<n> = Rd<n+1> ; 0 <= n <= 6
Flags: Z,C,N,V
This operation shifts the register right 1 bit. The MSB is preserved, keeping the sign of the twos-complement operation, and the Carry flag is set to the previous LSB.
Example:
ASR R31
ASR R0
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