Syntax: ADIW Rd,k
Operation: Rd+1:Rd = Rd+1:Rd + k
Flags: Z,C,N,V
This adds the 6 bit immediate to the two registers Rd and Rd+1 and stores the result back in these registers. Rd must be either 24, 26, 28 or 30. The higher register is the most significant.
Example:
ADIW R24,63
ADIW R30,$10
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